Niculae, Adrian Sorin: Development of a low noise analog readout for a DEPFET pixel detector. 2004
Inhalt
- Contents
- 1 Introduction
- 2 The DEPFET principle
- 2.1 The p-n junction diode
- 2.2 The JFET transistor
- 2.3 JFET integration in the DEPFET detector
- 2.4 Clear mechanism of the DEPFET detector
- 2.5 Description of the investigated DEPFET devices
- 3 Static measurements of the DEPFET detectors
- 3.1 Static characteristics of the JFET transistor
- 3.2 Static characteristics of the clear structures
- 3.3 Depletion characteristics of the DEPFET substrate
- 3.4 JFET characteristics with the substrate depleted
- 4 Small-signal and noise analysis of the DEPFET
- 4.1 Small-signal equivalent circuit of a JFET
- 4.2 Small-signal analysis of the DEPFET device
- 4.3 Noise analysis of the DEPFET
- 5 Analog readout in CMOS technology
- 5.1 Noise considerations
- 5.2 The voltage feedback ampli.er
- 5.3 Regulated cascode ampli.er
- 5.4 The complete design of the feedback ampli.er
- 5.5 Shaper design
- 5.6 Analog output bu.er
- 5.7 Multi-channel structure of the readout
- 6 Measurement of the readout chip without detector
- 6.1 Setup for testing the readout
- 6.2 Measurement of the DEPFET bias current source
- 6.3 Measurement of the feedback ampli.er
- 6.4 Measurement of the CRRC shaper
- 6.5 Measurement of the shaper based on OTAs
- 7 Measurements of the readout chip with the detector
- 7.1 Setup for energy measurements
- 7.2 Measurements with DEPFET Type-I and II
- 7.3 Measurements with DEPFET Type-III and IV
- 8 Summary and outlook
- Appendix A Frequency analysis of the regulated cascode ampli.er
- Appendix B Calculation of A1, A2, A3 for an nth order Filter
- Appendix C Data sheets
- Bibliography
- List of Figures