Inhalt

•  
   Introduction
•  
   DRPM
•  
   INDRA2
•  
   OLTRE
•  
   Organization
•  
   Background
•  
   SRAM-based FPGA Architecture
•  
   Terminology
•  
   Clock Regions
•  
   Programmable Interconnection Points (PIPs)
•  
   Configuration Memory (Bitstream)
•  
   Routing Physical Wires
•  
   Xilinx FPGA families
•  
   Space-Grade devices
•  
   Dynamic Partial Reconfiguration
•  
   Benefits
•  
   FPGA partitioning
•  
   Communication Infrastructure in a PR system
•  
   Embedded Macros
•  
  Xilinx Design Flow
•  
   ISE
•  
   FPGA Editor
•  
   XDL tool
•  
   Vivado
•  
   Radiation Effects
•  
   Single Event Effects
•  
   Total Ionizing Dose
•  
   Radiation Sensitiveness on SRAM-based FPGAs
•  
   Permanent Faults in Routing Resources
•  
  State of the Art
•  
   XDL-based databases and APIs
•  
   ReCoBus and GoAhead
•  
   RapidSmith
•  
   Torc
•  
   Tincr
•  
   Comparison
•  
   Dynamic Partial Reconfiguration Tools
•  
   Xilinx ISE DPR
•  
   INDRA
•  
   ReCoBus and GoAhead
•  
   OpenPR
•  
   Dreams
•  
   Comparison
•  
   Reconfiguration in Space Applications
•  
   DPR research platforms
•  
   In-flight reconfigurable space-missions
•  
   Commercial FPGAs in Space
•  
   Comparison
•  
   Testing of Routing Resources
•  
   Fault Detection mechanism
•  
   Off-line application-independent testing
•  
   On-line application-independent testing
•  
   Motivation
•  
   Summary
•  
  Dynamically Reconfigurable Processing Module
•  
   System Architecture
•  
   RAPTOR-X64
•  
   DB-SPACE
•  
   DB-V4
•  
   Memory Resources
•  
   DRPM Software
•  
   Software Structure
•  
   HMPCI
•  
   Related Works
•  
   Inter-Processor Communication Interface
•  
   HMPCI Interactions
•  
   Inter-Processor Communication Protocol Details
•  
   Using the Inter-Processor Communication Interface
•  
   HMPCI on the DRPM
•  
   Experiment Results
•  
   Summary
•  
  DRPM Evaluation and Validation Environment
•  
   Avionic Interfaces Testing
•  
   DRPM GUI
•  
   Summary
•  
  INDRA2
•  
   Flow Description
•  
   FPGA partitioning
•  
   Communication Macro Generation (DHHarMa)
•  
   Static PAR and PSrerouter
•  
   Dynamic Modules Implementation
•  
   Bitstream Generation
•  
   DHHarMa
•  
   DXF
•  
   Xilinx-based front-end
•  
   DHHarMa back-end
•  
   Output XDL File
•  
   PSrerouter
•  
   Problem definition
•  
   Implementation Idea
•  
   Physical Wire Info
•  
   Database Creation Flow
•  
   Benchmark
•  
   PSrerouter flow
•  
   Summary
•  
   DHHarMa Router
•  
  General Purpose Routing Analysis
•  
   Virtex-4
•  
   Virtex-5
•  
   Virtex-6 and Spartan-6
•  
   7 Series and Zynq
•  
  Homogeneous Routing Base Concepts
•  
   Standard Routing Algorithms
•  
   Iterative Deepening Depth-First Search algorithm (IDDFS)
•  
   Routing Direction and Wrong Direction
•  
   Nets Terminology
•  
   Net Initialization
•  
   Master and Slave Regions
•  
   DHHarMa Homogeneous Router Flow
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   Initialization Phase
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   Edge Routing Phase
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   Intra-Routing Phase
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  DHHarMa Results
•  
   Routing Experiment Flow
•  
   Routing comparison
•  
   DRPM communication infrastructure
•  
   Further Applications of the Homogeneous Router
•  
   Summary
•  
   OLTRE
•  
   Flow Structure
•  
   The OLTRE CAD Flow
•  
   Design-time Test Generation Sub-flow
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   Run-time Test Execution Sub-flow
•  
   Circuits for Testing of Permanent Faults
•  
   The 8-NUT Hard-Macro
•  
   Routing Faults Test Principles
•  
   Graph Model of FPGA
•  
   Stuck-at Coverage
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   Stuck-off Coverage
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   Stuck-on Coverage
•  
  RRA
•  
   Testability of the Routing Resources
•  
   RRA Flow
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   TCI Analysis
•  
   TCD Analysis
•  
   Result Output
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  The U-TURN Place-and-Route Algorithm
•  
   The TPG & ORA Placer
•  
   The N-UT Router
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  Results
•  
   Test Circuit Validation
•  
   Design-time Performance Analysis
•  
   Run-time Performance Analysis
•  
   Summary
•  
   Conclusion and Outlook
•  
   Outlook
•  
   List of Figures
•  
   List of Tables
•  
   Acronyms
•  
   Bibliography
•  
   Advised Thesis
•  
   Author's Publications