Indiveri, G.; Chicca, Elisabetta; Douglas, R. J.: A VLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity. In: IEEE Transactions on Neural Networks. Jg.17 H. 1. 2006, S. 211-221
Inhalt
- III. VLSI D EVICE ' S N EURONS
- Fig. 2. Circuit diagram of the I&F neuron. See Section€III-A for
- Fig. 3. (a) Mean response of all neurons in the array to increas
- Fig. 4. (a) Raster plot showing the response of the array of neu
- Fig. 5. Mean power dissipation of the neuron as a function of $V
- Fig. 6. Excitatory synapse circuit. The bistability circuit comp
- Fig. 7. (a) Spike traces obtained by stimulating the short-term
- Fig. 8. Synaptic efficacy STDP circuit.
- Fig. 9. Changes in synaptic efficacy, as a function of the diffe
- Fig. 10. (a) Mean probability of LTP over all STDP synapses in t
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