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Approaching system level design
In: VHDL for simulation, synthesis and formal proofs of hardware, Jg. 1992, S. 259-2762009A concept for the editing of hardware resulting in an automatic hardware editor
In: 14th Design Automation Conference, New Orleans, Jg. 1977, S. 187-1932009The concurrent programming language CAP and the -processor oriented CAP CAD-system
In: Microprocessors and their applications / Symposium on Microprocessing and Microprogramming <5, 1979, Göteborg>, Jg. 1979, S. 249-2582009Design aids for highly distributed hardware
In: Concurrent languages in distributed systems / Workshop on Hardware Supported Implementation on Concurrent Languages in Distributed Systems <1984, Bristol>, Jg. 1985, S. 135-1492009DIGITEST II : an integrated structural and behavioural language
In: International Symposium on Computer Hardware Description Languages and their Applications, New York, 3, Jg. 1975, S. 38-442009DIGITEST: a structural language based on algebraic models of the logic topology and the time behaviour of digital circuits
In: Proceedings of 2nd Workshop on Computer Hardware Description Languages, Darmstadt, Jul. 1974, Jg. 1974, S. 126-1282009Five valued quasi Boolean functions
In: Fifth European Meeting on Cybernetics and Systems Research / European Meeting on Cybernetics and Systems Research <5, 1980, Wien>, Jg. 35.1980, S. 2-52009Adaptable Switch boxes as on-chip routing nodes for networks-on-chip
In: From Specification to Embedded Systems Application, Jg. 184, S. 201-2102005
The hardware description language DACAPO III
In: Fundamentals and standards in hardware description languages, Jg. 1993, S. 395-4092009Hierarchical modular description of VLSI systems
In: Workshop report / VLSI and Software Engineering Workshop <1982, Port Chester, NY>, Jg. 1983, S. 112-1162009The implementation of the computer hardware description language CAP and its applications
In: Proceedings / International Symposium on Hardware Description Languages and their Applications <1979, Palo Alto, CA>, Jg. 1979, S. 138-1442009Mixed level modelling and simulation of VLSI systems
In: Logic design and simulation, Jg. 1986, S. 95-1342009